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Further reading □ OverviewAbout FerrantiBrochure □ Architecture □ Architecture1-Level StorageWordsInstructionsOrder CodeAnimated □ Hardware □ Fixed StoreSupervisorOverviewSchedulerCore MemoryAtlas CardAtlas ConsoleConsole Details □ Chilton □ Chilton AtlasDownstairs □ Manchester □ Manchester Atlas □ London □ London AtlasLondon Software □ Atlas II □ Atlas 2 BrochureTitan AutocodeCambridge Atlas □ Closure □ Atlas Closure
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ACL ACD C&A INF CCD CISD Archives
Further reading

OverviewAbout FerrantiBrochure
Architecture
Architecture1-Level StorageWordsInstructionsOrder CodeAnimated
Hardware
Fixed StoreSupervisorOverviewSchedulerCore MemoryAtlas CardAtlas ConsoleConsole Details
Chilton
Chilton AtlasDownstairs
Manchester
Manchester Atlas
London
London AtlasLondon Software
Atlas II
Atlas 2 BrochureTitan AutocodeCambridge Atlas
Closure
Atlas Closure

Atlas Words

A single Atlas word can be used to represent any of the following:

  1. A 48-bit floating or fixed point number, with the 8 most-significant bits representing the exponent and the other 40 the mantissa.

    0 17 EXPONENT 8 947 MANTISSA
  2. Two 24-bit half-word numbers. These are taken usually as 21-bit signed integers in digits 0-20, with an octal fraction in digits 21-23.

    020 21-23 2444 45-47
  3. Eight 6-bit characters.

    05 0 611 1 1217 2 1823 3 2429 4 3035 5 3641 6 4247 7
  4. An instruction, specifying a function F (most-significant 10 bits), two index registers Ba and Bm (7 bits each) and an address N (least-significant 24 bits).

    09 F 1016 Ba 1723 Bm 2447 023 N

Addresses

The 23-bit main store address consists of

0 111 1220 21 Block number Word number in block Half-word address 22-23 Character address

The bits 12-20 define the address of an instruction within a 512-word page while the block address uniquely defines the address within the 1-level storage system. Blocks are moved from drum to store as required under the control of the Supervisor.

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