This project is for the development of a parallel computing system based on the dataflow model of computation. This model yields irregular concurrency at the instruction level. It allows a wider range of applications than the more rigid vector and array processors.
The primary short-term goals are to complete implementation of the prototype single-ring system now in operation; to conduct further analysis of its performance; and to tune the existing hardware for optimum technology-bound performance. The long term goals centre around construction and tests of a full multi-ring system; investigation of storage hierarchy management in both single and multiple rings; and the techniques for parallel dataflow algorithm design.
By summer 1983, the single ring prototype was about 90% complete, and had achieved speeds of up to 2 MIPS. Preliminary performance evaluation completed, with encouraging results - without hardware tuning, performance improvement through concurrency is almost linear for up to 10 processing elements. A maximum of 15 processing elements have been in operation. A new Matching Store using dynamic RAM has been designed and is about to be commissioned. A multi-ring simulator based on M68000 hardware has been constructed. A new front-end system has been installed.
Hardware upgrade and tuning now in progress will be followed by further evaluation exercises. The experimental system is now supported by a large front-end computer providing fuller operation and development facilities. Studies in store utilisation are underway, as is work on parallel algorithm transforms. As well as the investigators' team, the prototype is being employed by several external users to test a variety of applications - providing very useful feed-back on design and performance. Participation by external users in this way will be further encouraged. supported by the new front-end facility and a DCS-supported User Liaison Officer.
The prototype system is immediately useful for testing dataflow codes on real hardware - this may well be valuable to industry in assessing the commercial viability of dataflow products. These products themselves could be applicable to areas with irregular problem parallelism: these include numerical applications such as simulation and automated design, and, possibly, to non-numerical areas such as data processing and artificial intelligence. One computer manufacturer is already testing CAD algorithms on the dataflow hardware.
1. I. Watson and J. R. Gurd, A Practical Dataflow Computer, IEEE Computer, V01.15, No.2, p 51. February 1982.
2. J. G. D. da Silva and I. Watson, A Pseudo-Associative Store with Hardware Hashing, Proceedings of the IEE, Vol.130E, No.1, January 1983.
3. J. R. Gurd and I. Watson, Preliminary Evaluation of a Prototype Dataflow Computer, Proceedings of the 9th World Computer Congress, IFIP '83, North Holland, September 1983.
Local area networks have generally been developed in response to a need for resource sharing among a group of computer users concentrated in a small geographical area, typically within a single building. At the University of Manchester there are many groups of users concentrated in a number of buildings scattered about a large campus. Many have computing facilities of their own but virtually all require access at some time to the central facilities provided by UMRCC (the University of Manchester Regional Computing Centre). UMRCC. furthermore, is housed in the same building as the Department of Computer Science, which has traditionally been involved in the design and implementation of the hardware and software of large computer systems and which is currently involved in the implementation of a large multi-computer system, MU6. Centrenet has therefore been designed as a system capable of satisfying the requirements, not only of a closely knit multi-computer system such as MU6, but also of a scattered community of users who wish to transfer files between their own machines and the central site, to gain terminal access to a variety of systems, and to share a variety of hardware and software resources.
The principal aim of the project is the implementation of a high performance networking system, but this will entail research in a number of areas. These include the technology of switching and transmission mechanisms, network and inter-networking architectures, network management software, network performance measurements and protocols for operating system interaction and for session level interaction.
Some hardware designed and implemented as part of an earlier pilot project supported by Department funds is now operational.
Software interfacing within MUSS to the hardware of the pilot project is under way. Some further pilot project hardware is being commissioned and some is being re-designed. Network management software is being written and partially tested on separate processing equipment.
This project is to develop basic software techniques for compilation from high-level programming languages to parallel dataflow hardware.
The project intends to link the prototype dataflow machine at Manchester to the SERC network and provide a software distribution scheme for dataflow experimenters, with a set of software tools. The project intends also to survey the field of potential high-level dataflow languages, and to provide a dataflow compiler for the most suitable language - selected or designed.
A portable dataflow simulator suite, including an assembler based development facility, has been produced and is available for distribution on tape, including documentation. This suite has also been successfully transferred to the new front-end system. A language survey has been completed [2]. A new single-assignment language SISAL [3], has been designed in collaboration with a major computer manufacturer and a National Laboratory in the USA.
Final work is in progress on a compiler for SISAL. Dataflow code is expected to be produced within the next few months. There will then be some time to investigate optimisation.
The tools now available are most useful to the dataflow language compiler writers working at lower level. The tools are useful to other experimenters in designing codes for simulation and hardware trial, including industrial workers. The SISAL compiler will have more general applicability for end-users.
1. J. R. Gurd. J. R. W. Glauert and C. C. Kirkham. Generation of Dataflow Graphical Object Code for the Lapse Programming Language, Lecture Notes in Computer Science. Vol. III. p 155. June 1981.
1. J. R. W. Glauert. High-level Languages for Dataflow Computers, Pergamon Infotech State of the Art Report on Programming Technology. p 173, March 1982.
1. J. McGraw, S. Skedzielewski, S. Allan, D. Grit, R. Oldehoeft, J. Glauert, I. Dobes and P. Hohensee, SISAL: Streams and Iteration in a Single-Assignment Language, Language Reference Manual. Version 1.0. July 1983.
