This project is concerned with the design and implementation of a multiple microprocessor computer system. The main aims of the project are firstly to obtain a better understanding of the problems arising across the hardware software engineering boundary within multiple processor structures and secondly, to develop a methodology for implementing applications software for such systems.
The hardware structure adopted is comprised of a number of multiprocessor shared memory stations which are linked together by means of a high-bandwidth serial communications sub-network. Both the number of processors within a station and the number of stations within the system can be readily varied and hence the implemented system is useful for investigating a wide range of different application environments.
The software being developed for the system is made up of a number of components. These include software tools to aid program development and testing (for example compilers, interpreters and performance monitoring and diagnostic software), system generation software to aid the mapping of applications software onto the selected multiple processor structure, and run-time support software for implementing intertask communication on the target hardware.
The laboratory development facility is comprised of the selected target multiprocessor hardware structure front-ended by a separate host machine. The latter contains both the language compiler and system configuration software and also the performance monitoring and diagnostic software. The host is interfaced to the same communications sub-network as is used for inter-station communication within the multiprocessor. This provides the users of the system with a convenient mechanism for investigating and monitoring alternative hardware and software assignment strategies. In order to make the laboratory development facility usable for a range of applications, most of the system is constructed from commercially available hardware components. Thus each station is comprised of a number of Intel 8086 based single board computers and the interstation communication sub-network is based on Ethernet.
The application programming language which has been developed is known as Martlet. It is based on two languages: Pascal and Ada. The sequential part of the language is basic Pascal and this has been extended to include the Ada commands to control and synchronise intertask communication. Wherever possible, all other supporting software is written in Pascal. The laboratory development facility is now operational and is currently being used as a research vehicle for investigating a range of problem areas associated with the use of multiprocessors in a number of real-time embedded applications.
A number of papers and conference contributions have been written describing aspects of the project and a selected list follows. For further information please contact either Professor Grimsdale or Dr Halsall.
1. R. L. Grimsdale, F. Halsall, F. Martin-Polo and G. C. Shoja, POLYPROC: The University of Sussex Multiple Microprocessor System, IEEE 2nd International Conference on Distributed Computer Systems. Paris, April 1981.
2. R. L. Grimsdale, F. Halsall. F. Martin-Polo and S. A. Wong, Structure and Tasking Features of the Programming Language Martlet, Proceedings lEE. Vol. 129, Pt. E. No.2, March 1982.
3. G. C. Shoja, F. Halsall and R. L. Grimsdale, Control Kernel to Support Ada Intertask Communication on a Multiprocessor Computer, lIEE Journal Software and Microsystems, Vol. 1, No.5, August 1982.
4. G. C. Shoja, F. Halsall and R. L. Grimsdale, Some Experiences of Implementing the Ada Concurrency Facilities on a Distributed Microprocessor Computing System, Software and Microsystems, Vol. 1, No.6, October 1982.
5. F. Halsall, R. L. Grimsdale, J. E. Lambert and G. C. Shoja, Development Environment for the Design and Test of Applications Software for a Distributed Multiprocessor Computer System, Proceedings IEE. Vol. 130, Pt. E, No.1, January 1983.
The aim of this project is to investigate the design and implementation of the operating system software required for the management and control of the shared resources - both hardware (files, peripheral devices, etc.) and the software (shared data structures, schedulers, etc.) - in a distributed computer system which provides resiliency to both hardware and software failures. It is envisaged that the proposed software structure will be particularly suitable for those application areas of multiprocessors such as on-line terminal enquiry systems which demand a high level of system availability.
To satisfy the requirements of these systems, resiliency in the system software is provided by the avoidance of any single, critical, centralised controllers. Instead, control is distributed throughout the processing units which comprise the system. Thus loss of a processing unit through failure does not result in a total system failure but rather the loss of some localised processing function and resource.
The system software is organised as a suite of virtual resource rings, each ring managing all resource components of a particular resource type in the system. A ring consists of a set of instances of a software task known as a ring element. These instances in turn control access to specific components of the resource type managed by that ring. Each element in a ring then receives calls requests for a resource or output from a resource - from its preceding element in the ring and in turn makes calls to its succeeding element. Thus in order to construct a ring. it is only necessary for each element to know the identity of its succeeding element in the ring.
The loss or failure of a processing unit within the system will be reflected in each ring for which is contained an element. This loss is detected by each failed element's predecessor in the ring as a failure to obtain a good reply to a call and hence the predecessor automatically tries to establish a new communication path to the next available element. Thus a faulty system processing unit is automatically isolated from all the affected rings (and hence the system) and the rings themselves are automatically reconfigured to reflect the loss.
The ability to reconfigure the system, to add additional resources as demand rises or to remove processing units for preventive maintenance, means the system has good modularity and extensibility properties.
The research is being conducted using the facilities currently available on the University of Sussex multiple microprocessor system Polyproc [1]. The implementation of Polyproc forms part of the current DCS programme and although the facilities provided by it are currently being enhanced, the basic system is now operational and this is proving to be an ideal vehicle for an investigation of this type. All application software for Polyproc is written in a high-level structured language - Martlet - and the system provides a convenient facility for both the assigning and distributing application software onto the multiprocessor and also for monitoring subsequent performance.
A more detailed description of the virtual resource ring and its operation can be found in [2] below and for further information please contact either Professor Grimsdale or Dr Halsall at the University of Sussex.
1. R. L. Grimsdale, F. Halsall, F. Martin-Polo and G. C. Shoja, Polyproc: The University of Sussex Multiple Microprocessor System, Proceedings 2nd International Conference on Distributed Computing Systems, Paris, April 1981.
2. R. Hull, F. Halsall and R. L. Grimsdale. Decentralised Resource Management in a Resilient Distributed Computer System, IEE proceedings. Part E. Computers and Digital Techniques, ISSN 0143-7062
This project is concerned with research into an alternative transmission system for use in local area networks which provides a communications facility having only modest overheads per user device but offering considerable versatility both in its use and for future development. The system is based on a frequency division multiplexed (FDM) broadband transmission facility similar to that currently employed in coaxial cable television distributed networks. Much of the technology used in such networks can, with the aid of some additional RF components (modems, head-end remodulators etc.), also be used to provide versatile transmission facility for carrying a wide range of different data traffic on a single coaxial cable. These are obtained by the allocation of different frequency channels within the total available bandwidth of the cable and associated repeater amplifiers. Whereas the majority of existing networks are strongly associated with a specific protocol to which all devices must conform, within a local area network there is also a need for peer-to peer communication with minimum constraints on the communicating devices. Thus the provision of a number of 9.6K bit/sec channels available on a long term base or on demand will be of value in meeting this requirement. Further channels at 64K bit/sec can be provided which might be used either for voice communication or as dedicated links to provide the transmission layer of a packet-switched network (X25, for example). One or more high bit rate channels of the order of 10M bit/sec capability can be dedicated to a CSMA/CD facility. The same cable will also be capable of supporting a number of video links using existing CATV technology.
This is a collaborative project with Rediffusion Engineering Limited. This company has considerable expertise in the use and installation of CATV systems and the aim, therefore, is to build on this expertise and to investigate the design of the additional system components necessary to use this technology in the field of local area networks.
It is proposed to construct a complete system at the University and install an number of intercommunicating devices. These will include intelligent devices (computers etc.) also a number of unintelligent terminals to test the dedicated and on-demand low bit rate channels. The experimental system will also include a head-end remodulator and performance monitoring and diagnostic facilities.
Work has commenced on the design and implementation of a low bit rate frequency-agile modem which is also suitable for use as a fixed-frequency modem. This design exploits the use of modern frequency synthesiser technology for channel selection and also a dedicated microprocessor for its control. In addition, work is in progress on the implementation of a high bit rate (10 Mbps) fixed frequency modem which is intended for use with a CSMA/CD based channel.
Initially it is proposed to implement a simple head-end remodulator to allow the two designs of modems to be tested on an actual cable and when these are firm to concentrate on the design of the remodulator itself. It is envisaged that work on the system performance monitoring and diagnostic facility will also commence at this time.
Research work is underway at the University of Sussex on a low cost visual system for flight simulators using computer generated images. The work divides into three main areas: the creation of and access to large data bases, the development of a surface based visual system and the development of a texture generation system.
A simple prototype of the surface based system has been demonstrated and the implementation of an enlarged system is currently in hand. Ultimately this will be capable of up to 500 surfaces per frame. A test pattern has been achieved using texture generation hardware that can be flown in real time.
The integration of texture and surface based display systems, scheduled for the end of 1983, can be achieved in one of two ways. Either the texture system is superimposed on the surfaces (e.g. brickworks on walls or ploughlines across fields) or the surfaces are superimposed on a textured ground plain; the ground plain would be a pseudo random patchwork of hangers, houses, roads and mountains. Suitable database selection will enable levels of detail to be selected according to the distance of the observer.
The high speed processors needed for the generation of the images have been developed at Sussex with a design philosophy of modularity and expansibility with emphasis on high quality engineering and manufacture. Various types of modular processor have been produced using the custom solder wrap technique.
Investigation is currently underway on the possibility of implementing certain parts of the circuitry in VLSI. It is hoped that a system will emerge that will be exploited commercially while further research work, such as the generation of complex objects like trees. continues at Sussex.
The underlying assumption behind this project is that as computer hardware becomes less expensive, it will be possible and desirable to build systems consisting of many computers all cooperating in the solution of a single complex problem of the type encountered in Artificial Intelligence (AI) projects. Programming such systems will pose new and difficult problems, and the need has arisen to develop as sophisticated tools as possible to help in this task; it was felt that such tools should be interactive in nature.
The original goals of the project were:
The hardware consisted of a PDP-11/34 host minicomputer and a number of LSI-11/2 distributed machines; communication was by individual serial lines. The host machine ran the UNIX operating system, and the distributed machines were to provide a UNIX-like environment for processes running on them. It was to be possible to run more than one process on the host, and to run a given process either on the host or on an LSI-11 with minimal charges.
It became evident that the serial lines were inadequate for the task, and a new goal was set of implementing the system using the recently developed Cambridge Ring for communication. In addition, it was decided that a simple reimplementation of POPEYE would not explore the possibilities opened up by the distributed system, and that a new approach to that part of POPEYE which deals with letter recognition should be developed. In parallel with the work on image interpretation, it was decided to implement distributed programs in several other AI domains (viz programming aids, natural language understanding).
The project has produced a set of software tools which allow the user to specify a distributed system in terms of both hardware and software, and to initialise such a system correctly. The interactive AI language POP-11 is available on all of the machines, this is supported on the LSI-11's by a single process operating system called MONIX. However the use of serial lines produces a system which is too slow to be of practical use (see below).
A number of distributed programs have been implemented to test the system; these have all been run in simulation on the host.
One program in fact provides an environment for the development of distributed programs; it consists of a network of processes which enable the user to inspect the design from different points of view.
A program which approaches the letter-recognition problem by analysing the input data in a series of fixations has been implemented.
Finally, a distributed parsing program demonstrates the use of interrupts in co-operative problem-solving and learning: a master program sets a task which may be attempted in parallel by different servants, using different strategies: e.g. one general but slow, the other faster but requiring prior learning experience. The first to finish may interrupt others, and send information for future use.
The project finished in September 1982 without the Cambridge Ring software being operational; however one of the grant holders (Dr Hunter) in collaboration with Dr C Mellish is to be supported for a further year to complete the installation of POP-11 and to mount the logic programming language PROLOG on the distributed system.
The system will provide a good interactive environment for investigating the decomposition of Intelligent Knowledge Based Systems.
1. A. Ramsay, An Environment for Developing Distributed Programs, Proceedings of ECAI - 82, Paris 1982.
2. D.Owen, Relating Object Models to Segmentation Strategies, Proceedings of ECAI - 82, Paris 1982.
