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Further reading ⇓

□ Overview □ Project
GEC
□ Overview □ 4000 Series □ GEC 4070 Operating System □ Installation □ Communications □ GEC 4000 family □ Nucleus □ Functional spec. □ Babbage assembler □ Instruction set manual □ Nucleus manual
Prime
□ Overview □ The company □ Primos Operating System □ Systems □ Communications □ Software □ Prime and UMIST □ Office Automation □ The Schools Project □ Prime 750 □ FOREST preprocessor □ META II TWS □ META II definition □ FINGS graphics system □ ROOTS extended FORTRAN □ Prime User Manual

Functional Specification

The GEC 4000 computer system seen by the programmer consists of:

Accumulator: A
The 32-bit main accumulator used for integer arithmetic on full-words (32 bits), half-words (16 bits) and 8-bit bytes. It is also used in floating-point operations.
Accumulator Extension: B
Used together with A to provide a 64-bit register for floating point operations and some integer operations.
Index Register: X
A 16-bit secondary accumulator for integer arithmetic on half-words and bytes. It is also used as an index register for indexed addressing of array elements.
Base Register: Y
A 16-bit base register used to hold the base address of an area of data.
Base Register: Z
A 16-bit base register similar to Y.
Local Workspace Register: L
A 16-bit register that holds the base address of the area of store containing the local workspace of part of a program. It is not altered explicitly by the program, but is set up by the Nucleus when a program chapter starts executing.
Sequence Register: S
A 16-bit register containing the address of the first byte of the next instruction in sequence to be executed. It is used for addressing the code constants of a program. It is not altered explicitly by the program, but is set up by the Nucleus when a program chapter starts executing.
Control Register: C
An 8-bit register containing various flags indicating the state of a program.
Base Register: G
This is more a conceptual register as it always contains zero. Using G always addresses the record at the base of the virtual store.

4080 instructions that reference the 16-bit virtual store consist of a reference to a base register and a 4 to 8 bit relative address (or offset) from that base. In the simplest addressing format, the offset is scaled according to the size of the data item to be referenced before being added to the base register. Other addressing formats are provided that have the scaled contents of the X register added either to the address computed or the content of the address referenced (indirect addressing). In all, this results in 14 different addressing formats (G, S, L, Y, Z, GI, SI, LI, YI, ZI, GX, LX, YX, ZX) where I indicates indirect addressing and X where the X-register is added to the address computed.

Most instructions are 16-bit with 6 bits defining the function. These bits appear at different places in the 16-bit word depending on the class.

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