Contact us Heritage collections Image license terms
HOME ACL Associates Technology Literature Applications Society Software revisited
Further reading □ Overview □ Brochures □ ICT 665 printer (1960)Ampex TM-2 tape deck (1961)Anelex printer (1961)Creed 300 tape punch (1961) □ Papers: 1960 □ Users' specificationPunched card codesDescription of the Ferranti AtlasIBM magnetic tape □ 1961 □ Peripheral equipmentPunched tape codesMagnetic drumOperating SystemIBM tape control logicPaper tape inputOperator's I/O □ 1962 □ Memo on extracodes (April)Memo on extracodes (May)Primary SupervisorIntermediate SupervisorNotes on ExtracodesMonitor program □ 1963 □ Processing commercial dataMagnetic tapeIntermediate supervisorAlternative monitor actionNon-standard peripherals
ACD C&A INF CCD CISD Archives Contact us Heritage archives Image license terms

Search

   
ACLLiteratureACL Publications :: Early Atlas Documents
ACLLiteratureACL Publications :: Early Atlas Documents
ACL ACD C&A INF CCD CISD Archives
Further reading

Overview
Brochures
ICT 665 printer (1960)Ampex TM-2 tape deck (1961)Anelex printer (1961)Creed 300 tape punch (1961)
Papers: 1960
Users' specificationPunched card codesDescription of the Ferranti AtlasIBM magnetic tape
1961
Peripheral equipmentPunched tape codesMagnetic drumOperating SystemIBM tape control logicPaper tape inputOperator's I/O
1962
Memo on extracodes (April)Memo on extracodes (May)Primary SupervisorIntermediate SupervisorNotes on ExtracodesMonitor program
1963
Processing commercial dataMagnetic tapeIntermediate supervisorAlternative monitor actionNon-standard peripherals

Atlas Computer Users' Specification

February, 1960

CS 255

1. INTRODUCTION

The ATLAS general purpose electronic digital computer is the latest product of the collaboration between the Computing Laboratory at Manchester University and Ferranti Ltd; and it is as fast and versatile a computer as it is possible to design with the currently available components for circuit elements and storage. The computer operates in a parallel mode and transistor circuits are used throughout. Provision has been made for the attachment of a large number of peripheral devices (including fast printers and also readers and punches for both cards and paper tape) which makes ATLAS fully suitable for both numerical calculations and commercial data processing work.

2. LENGTH AND INTERPRETATIONS OF WORDS

The word length is 48 binary digits. A word may be interpreted in one of the following ways:

  1. a floating point number. Eight digits will represent the exponent and 40 digits the mantissa. Exponents are to the base 8 and the permitted range of a standardized floating point number of the form x. 8y is given by
    1. x, lying in one or other of the ranges -1 ≤ x -⅛ or ⅛ ≤ x < 1, and
    2. -128 ≤ y < 127.
  2. a fixed point number. A fixed point number comprises 40 digits, corresponding to the mantissa of a floating point number, the eight exponent digits being ignored. The range of fixed point numbers will be -1 ≤ x ≤ 1 - 2-39 for a fractional x, or -2-39 ≤ N ≤ 2-39-1 for an integral N.
  3. an alpha-numerical quantity. Such a word comprises eight six-bit characters.
  4. an instruction. An instruction comprises the following:
    1. 10 digits for a function part, F,
    2. 7 digits for a B-register address, Ba,
    3. 7 digits for a B-register address, Bm, and
    4. 24 digits for a central store address, S.

These terms are explained below.

3. THE ACCUMULATOR

The Accumulator has 8 bits for the exponent and 79 bits for the argument (i.e. sign bit + 78). There are no carry facilities across the 39 least significant bits. There are functions for putting a word from the store into the least significant 39 bits of the accumulator (dropping the sign bit), or sending one back to the store from there.

4. STORAGE

The S bits in an instruction are used, in general, to specify the address of a register in the central store. The least significant three bits specify a character position within a word so that 21 bits are available to specify the particular word. This enables a total store of up to 2,097,152 words to be specified. However, for ease of decoding, certain restrictions are imposed on this addressing system which lead to the following classification of parts of the central store.

4.1. MAIN STORE

This can consist of combinations of two physically distinct types of storage, namely,

  1. a magnetic core store, and
  2. magnetic drums.

Up to 1,048,576 words are addressable in this store. A minimum size would be 8,192 words of magnetic core storage while a typical installation might well have 16,384 words of core storage and four magnetic drums.

The magnetic core store will have an access cycle time of not more than two microseconds and, in order to give an effective access time of less than this, several independent access systems will be provided for sections of the store. The number of such access systems and the size of the individual sections will depend on the total amount of core storage provided with a particular machine. In the case of the prototype ATLAS eight sections each of 1024 words are supplied. These separate selection circuits allow overlap between instructions, for instance it is possible to be extracting the next instruction from the store before the last instruction has been regenerated. Another common case is that of a B-instruction which follows an instruction referring to the store, and is completely overlapped by it. The magnetic drums will each hold 24,576 words. The revolution time is approximately 12 milliseconds and words will be recorded on several parallel tracks. Up to 16 such drums can be attached to a particular machine.

4.2 The remaining 1,048,576 addresses will be allocated among the following stores.

4.2.1 Fixed Store

This is constructed from a woven wire mesh into which patterns of ferrite rods are inserted, the pattern of rods corresponding to pattern of zeros and ones to be stored. Allowance is made for up to 262,144 words to be accommodated in this store, although it is unlikely that more than 8,192 words will exist in any particular machine. A minimum size of 4,096 words is necessary for the essential programmes to be stored in it. The access time for the fixed store is about 0.2 microseconds.

The fixed store will be used to hold:

  1. extracode routines, (see below)
  2. fixed programmes (principally concerned with the organisation of peripheral transfers), and
  3. (
  4. useful constants.
4.2.2 Subsidiary Store

This is similar in physical form to the core store. Allowance is made for up to 262,144 words to be accommodated in this store, although it is unlikely ever to exceed 1048 words in a practical installation. It is to be used as working space for the programmes held in the fixed store and a lock-out will be provided to prevent this store being used by programmes other than those in the fixed store.

4.2.3 V-store

This comprises registers which may be scattered throughout the computer and which are, in general, associated with peripheral equipments and the magnetic drums. For example, it will include

  1. Page Address Registers, indicating the block numbers (see 4.2.4) of information currently held in the core store,
  2. flip-flops associated with the magnetic tape channels, and
  3. the registers indicating the current angular position of each magnetic drum.

The addressing system for the V-store allows up to 262,144 such registers to be included, but in practice the number is unlikely to exceed a few hundred, depending on the number of peripheral attachments.

A lock-out will be provided to limit the use of this store to programmes held in the fixed store.

4.2.4 The One-Level Store

Information held in the main store can be regarded as being in blocks of 512 words. Individual words can be dealt with only when the block containing it is currently held in the magnetic core store. If an individual word is required (e.g. as the next instruction or an operand for the current instruction) and it is currently held in a block on the magnetic drum then that block must first be transferred to a suitable position in the magnetic core store.

The address decoding arrangements are such that for every address a comparison is made with the block numbers of the blocks held in the core store. If no agreement is found an organisational programme held in the fixed store is automatically entered to initiate an appropriate interchange of blocks between the core store and the drum store, thus bringing the required word into the core store, so that the programme calling for this word can continue. The programmer may therefore regard the whole of the main store as a one-level store despite its physical heterogeneity.

In addition to these automatic transfers between the core store and the magnetic drums, conventionally programmed transfers are permissible.

4.3 B-REGISTERS

In addition to the stores listed above there is a further magnetic core store comprising 128 24-bit registers, the B-registers, which is not addressable by the S-bits but is referred to by the Ba and Bm bits in an instruction. (For convenience in the design of the computer a few of the registers which, from a programming point of view, may be regarded as part of this core store, are in fact flip-flop registers. Further, the register referred to when Ba or Bm is zero is a null-register always containing zero.) This assembly of registers has an access cycle time of 0.5 microseconds. (Less in the case of the flip-flop registers.) The principal use of this store is for order modification.

5. ORDER MODIFICATION

Before the majority of instructions are obeyed the contents of the register specified by the Bm digits of the instruction are added to the S digits and the modified S digits are interpreted by the instruction. For certain instructions the Ba digits are used in a similar way so that two additions to the S digits take place before the instruction is obeyed.

6. THE FUNCTION CODE FOR INSTRUCTIONS

The function code may be broadly grouped under the following headings:

  1. floating point accumulator instructions,
  2. fixed point accumulator instructions,
  3. arithmetic and logical operations on B-registers,
  4. test instructions, and
  5. miscellaneous instructions.

Within each of these groups of instructions a further subdivision into basic and extracode instructions can be made. Basic instructions are obeyed directly by means of equipment built into the computer while extracode instructions cause an automatic entry to appropriate sequences of basic instructions in the fixed store. When the appropriate sequence has been obeyed control is returned to the instruction next following the extracode instruction which has just been completed.

Basic instructions cover:

  1. the more common fixed and floating point arithmetic operations of addition, subtraction, multiplication and division,
  2. a comprehensive range of arithmetic and logical operations on the contents of B-registers (including single and six-bit shifts), and
  3. many test and counting instructions.

By means of the extracode facilities a very extensive order code is available, including the evaluation of simple functions, double length operations, and various more sophisticated operations. To the programmer all these appear as single instruction.

For ease of decoding the 1024 possible functions are subdivided into a maximum of 512 basic instructions and 512 extracode instructions.

6.1 INSTRUCTION TIMES

The times for instructions depend first on the amount of interleaving resulting from the multiple access system. On this basis typical times are

  1. the addition of two floating point numbers, 1.1 microseconds and
  2. the multiplication of two floating point numbers, 3.5 microseconds.

However these times will be effectively reduced by the overlapping of accumulator and B-register operations.

7. PERIPHERAL ATTACHMENTS

The design of the main (central) computer is such that a wide range of peripheral equipments may be attached. These may include:

  1. Punched paper tape readers,
  2. Punched paper tape punches,
  3. Flexowriters,
  4. Punched card readers,
  5. Punched card punches,
  6. Line printers, and
  7. Magnetic tape mechanisms.

In general little buffer storage will be associated with any input or output channel, transfers of individual characters or words being organised between the computer and the equipment by means of programmes held in the fixed store. Automatic entry to these programmes will take place whenever an equipment requires attention; the main programme currently being obeyed is interrupted and control returned to it when the peripheral programmes have been obeyed.

7.1 MAGNETIC TAPE EQUIPMENT

Ampex PR 300 magnetic tape mechanisms are being attached to ATLAS. The tape is of one inch width accommodating sixteen information channels, including clock and address channels. The transfer rate for a tape input/output channel is one word every 89 microseconds. A maximum of eight such channels are available and each channel can select one mechanism from a group of four. Thus, in all, 32 mechanisms can be supplied and up to eight can be transferring data at any one time.

8. TIME SHARING

When a programme being currently obeyed is held up for any reason (for example, awaiting information from magnetic tape) control may be transferred to a fixed store programme, the supervisory programme, which in turn can transfer control to another programme that is waiting to run. In this way several programmes can be held in the computer and these may share the time of the computer in the most efficient way determined by the supervisory programme.

9. MONITORING

Because of the high speed of operation of the machine conventional monitoring of information within the machine will not be possible. Instead a monitoring programme will be held in the fixed store and entry to this programme will be effected whenever information regarding the state of the machine is required. This programme will organise a print-out of relevant information. Entry may be either under programme control or may occur automatically when a programming error or machine error is detected (e.g. an error in a magnetic tape transfer).

10. CHECKING

All internal transfers of information will be checked by means of a parity check. In addition transfers of information between the central computer and peripheral devices will be checked by appropriate means depending on the device. For example, magnetic tape recording will be checked by recording a check sum following each block of information and by a trailing read head.

The purpose of this document is to give as accurate a description of the machine as is possible at this stage in its development. It must be appreciated that some changes are inevitable and that further documents giving more accurate and detailed information will be issued.

⇑ Top of page
© Chilton Computing and UKRI Science and Technology Facilities Council webmaster@chilton-computing.org.uk
Our thanks to UKRI Science and Technology Facilities Council for hosting this site