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SIGCD: Digital and Analogue Circuit Design

There were originally two SIGs covering Digital and Analogue Circuits. They were merged with the focus on supporting software for:

The SIG mounted the following programs:

Software Description Machine
ANP Frequency and time-domain analysis. Pole-zero analysis developed at Lyngby IBM 360/195, Prime
ASTAP Advanced Statistical Analysis Program. More flexible analysis program. Analyses large systems and can predict their statistical behaviour. Made available by IBM IBM 360/195, accessible from PRIMEs
CSMP Continuous System Modelling Program (IBM). Large system electromechanical and general simulation and analysis IBM 360/195
DDL Digital System Design Language DEC 10, Prime
DDLSIM Barbacci's Simulator for Dietmeyer's DDL DEC 10
DIGSIM Digital Logic Design Simulator for Continuous Processes. Bengt Magnhagen, Linkoping DEC 10
GAELIC IC Layout: Chip and board layout and production. J D Eades, Edinburgh DEC 10 and Prime
HELP Comprehensive information and help system for DACD DEC 10, PRIME
ICAP AC Analysis. Linear small-system analysis in the frequency domain PRIME
ISPS Simulator for Bell and Newell's Instruction Set Processor Language (ISP) DEC 10
ITAP Interactive Transient Analysis Program for small systems. K G Nichols, Southampton PRIME
MICRO-I Cross-software for popular microprocessors PDP10
NAP-2 AC, DC, Transient Analysis. Research package for analysing the transient behaviour of medium-sized systems from Lyngby in Denmark. IBM 360/195, PRIME (also user courses).
PCIRC PCB Layout PRIME
SCEPTRE Considers effect of radiation IBM 360/195
SIM11 General system simulation Prime, GEC
SP Scattering Parameter Analysis. Analysis of two-port structures PRIME
SPICE-2 AC, DC, Transient Analysis. Analyses transient behaviour of large systems; its modelling capacity is restricted compared to ASTAP but it is cheaper to run. IBM 360/195, accessible from PRIMEs

A library of microprocessor software including cross-assemblers, simulators was set up on the UMIST DEC-10.

ISPS
This package provided interactive simulation of a digital system described in the language ISPS, which is the computer implementation of the Instruction Set Processor (ISP) language. This allowed a digital system (of which digital computers are a subset) to be described at the register transfer level or at the programming level. The ISPS language was designed to describe digital systems. The ISPS simulator was designed to allow the user to set break points and interrogate the status of hardware at any point during the simulation. The simulator could also be used to initiate separate processes, which could be complete ISPS descriptions, and hence simulate concurrent systems. 20 ISPS descriptions of popular computer architectures could be used to create simulators which could execute code for the target machine. Special purpose cross-assemblers were developed for four popular 8-bit microprocessors: 8085, 6502, 6800 and 680l that could produce code in a form suitable for direct entry into the corresponding ISPS based simulators.
DDL and DDLSIM
DDL was a block structured register transfer language specially designed for describing digital hardware. It could handle combinational and sequential circuits.
DDLSIM could be used to simulate a large class of digital systems from register transfer descriptions to combinational networks.
Pre-processors were provided to make it easier to set up the input data for both DDL and DDLSIM.
DIGSIM
A suite of interactive programs that allowed the user to prepare data for the main batch mode logic simulation program, and to display graphically the resulting network. After the rigorous statistical simulation had been completed, the results could be analysed by interactive post-processing. The simulator handled real components stored in a library (flip-flops, shift registers, monostables and code converters, as well as conventional logic gates).

Some of the projects that used the software were:

University/Institute Project
Bath Nonlinear magneto-static problems
Bristol Load variation analysis on communications network
RAL (SNS Project) Transient and frequency analysis of large power supplies.
Southampton Circular transistor modelling.
MOSFET multiplier configuration modelling.
Birmingham Various analogue electronic design problems
London Data flow architecture investigation

Support for the SIG was provided by Pete Dewar, Ian Benest, John McLean and Robert Gay.

Extra Mural Development Contracts with Essex and Reading Universities assisted in the availability of software.

A Prime 750 was installed at RAL to run GAELIC in support of M.Sc courses in integrated circuit design at several British Universities (Edinburgh, Durham, Southampton, Brunel and UMIST).

The SIG was eventually merged with a parallel activity promoted by the Solid State Devices Subcommittee of SERC on design, placement and layout for digital ICs. Later still, all of the programmes in IC design became the responsibility of the Microfabrication Facilities Sub-committee of the Information Engineering Committee (IEC).

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