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Further reading □ Overview □ About Ferranti □ Brochure □ Architecture □ Architecture □ 1-Level Storage □ Words □ Instructions □ Order Code □ Animated □ Hardware □ Fixed Store □ Supervisor □ Overview □ Scheduler □ Core Memory □ Atlas Card □ Atlas Console □ Console Details □ Chilton □ Chilton Atlas □ Downstairs □ Manchester □ Manchester Atlas □ London □ London Atlas □ London Software □ Atlas II □ Atlas 2 Brochure □ Titan Autocode □ Cambridge Atlas □ Closure □ Atlas Closure
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⟶ ACL ⟶ Technology ⟶ ATLAS
⟶ ACL ⟶ Technology ⟶ ATLAS
ACL ACD C&A INF CCD CISD Archives
Further reading ⇓

□ Overview □ About Ferranti □ Brochure
Architecture
□ Architecture □ 1-Level Storage □ Words □ Instructions □ Order Code □ Animated
Hardware
□ Fixed Store □ Supervisor □ Overview □ Scheduler □ Core Memory □ Atlas Card □ Atlas Console □ Console Details
Chilton
□ Chilton Atlas □ Downstairs
Manchester
□ Manchester Atlas
London
□ London Atlas □ London Software
Atlas II
□ Atlas 2 Brochure □ Titan Autocode □ Cambridge Atlas
Closure
□ Atlas Closure

Atlas 1 Core Memory

Atlas 1 Core Memory

Atlas 1 Core Memory
Full image ⇗
© UKRI Science and Technology Facilities Council

The Atlas core memory was made by Plessey in these square ferrite core memory planes. Each side of the Bakelite frame had about 68 contacts on the outside. The memory itself consisted of a grid of thin wires with each junction containing a ferrite core. The size of the board is about 12 centimetres square and contained about 64 by 64 cores (bits).

Atlas 1 Core Memory

Atlas 1 Core Memory
Full image ⇗
© UKRI Science and Technology Facilities Council
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